The rapidly growing market for portable electronic devices, e.g. cellular phones, laptop computers, and tablet computers, is an integral facet of modern life. The multitude of portable devices represents one of the largest potential market opportunities for next generation manufacturing. These devices have unique attributes that have significant impacts on manufacturing integration, in that they must be generally small, lightweight, and rich in functionality and they must be produced in high volumes at relatively low cost.
As an extension of the semiconductor industry, the electronics manufacturing industry has witnessed ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace.
Manufacturing, materials engineering, and development are at the very core of these next generation electronics insertion strategies outlined in road maps for development of next generation products. Future electronic systems will be more intelligent, have higher density, use less power, operate at higher speed, and include mixed technology devices and assembly structures at lower cost than today.
There have been many approaches to addressing the advanced manufacturing requirements of microprocessors and portable electronics with successive generations of semiconductors. Many industry road maps have identified significant gaps between the current semiconductor capability and the available supporting electronic manufacturing technologies. The limitations and issues with current technologies include increasing clock rates, electromagnetic interference, thermal loads, second level assembly reliability stresses, and cost.
As these manufacturing systems evolve to incorporate more components with varied environmental needs, the pressure to push the technological envelope becomes increasingly challenging. More significantly, with the ever-increasing complexity, the potential risk of error increases greatly during manufacture unless monitoring during the fabrication process is performed.
Thin films are an essential part of fabricating electronics. Thickness measurements for thin films are normally done by optical or X-ray based techniques in a fast and non-destructive fashion. The X-ray or optical techniques can include Ellipsometry, X-Ray Reflectivity (XRR), or X-Ray Fluorescence (XRF). The common inherent disadvantage of such techniques is the big measurement spots, the sizes of which are usually from several millimeters to several tens of microns. Therefore, for the purpose of tuning and monitoring of the thin film deposition processes, such measurements are usually performed either on blank substrates (e.g., silicon wafer) or on specially designed monitor pads on patterned wafers.
Since the behavior of the thin film deposition processes on small patterned structures is often different from their behavior on the large monitor areas, the thickness results obtained cannot be used directly to assess the thickness on the small patterned structures. Due to such a limitation of the above mentioned thickness measurement techniques, scanning electron microscopy or transmission electron microscopy (TEM) imaging coupled with focus ion beam (FIB) or manual cross section, is often used to directly measure the thickness of the thin films on the small patterned structures.
The cross section imaging is performed either on finished devices or on specially designed sacrificial patterns on patterned wafers. Either solution can be very expensive. Another disadvantage of the cross section imaging is that it is extremely slow. The whole process of cross section imaging of even one sampling spot often takes several hours to finish; therefore, it cannot achieve the statistical precision that can be achieved by the optical and X-ray based metrology techniques.
An additional metrology challenge is measurement close to a substrate edge. As the integrated circuit (IC) manufactures strive to utilize more of the usable area of the wafer, film uniformity close to the very edge of the wafer is required and consequently measurements with two millimeters (mm) or even one-millimeter edge exclusion are demanded. The optical and X-ray based metrology tools have difficulty fulfilling such requirement because of their large spot sizes and the requirement of a flat substrate at the very edge of the wafer.
In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures adds an even greater urgency to the critical necessity for finding answers to these problems.
Thus, a need remains for thickness measurements of thin films on patterned wafers and especially those on the small patterned structures. Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.